Data storage layout
US9779019B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 18, 2015 |
| Grant date | Oct 3, 2017 |
| Priority date | — |
| Expiry date | Aug 30, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/1659
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Examples of the present disclosure provide apparatuses and methods for determining a data storage layout. An example apparatus comprising a first address space of a memory array comprising a first number of memory cells coupled to a plurality of sense lines and to a first select line. The first address space is configured to store a logical representation of a first portion of a value. The example apparatus also comprising a second address space of the memory array comprising a second number of memory cells coupled to the plurality of sense lines and to a second select line. The second address space is configured to store a logical representation of a second portion of the value. The example apparatus also comprising sensing circuitry configured to receive the first value and perform a logical operation using the value without performing a sense line address access.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.