Semiconductor package
US9780049B2 · kind B2 · utility
4Cited by
15References
22Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 15, 2014 |
| Grant date | Oct 3, 2017 |
| Priority date | — |
| Expiry date | May 15, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package includes a substrate; and first and second semiconductor chips sequentially disposed on the substrate so that active surfaces of the first and second semiconductor chips face each other, wherein the first and second semiconductor chips are center pad-type semiconductor chips each having I/O pads arranged in two columns to be adjacent to a central line thereof, and I/O pads of the second semiconductor chip are electrically connected directly to the substrate without intersecting the central line of the second semiconductor chip.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.