Method for fabricating semiconductor device including a first ILD with sloped surface on a stacked structure and a second ILD on the first ILD
US9780113B2 · kind B2 · utility
3Cited by
10References
20Claims
0Family size
Assignee
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Key dates
| Filing date | Dec 9, 2015 |
| Grant date | Oct 3, 2017 |
| Priority date | — |
| Expiry date | Dec 9, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/50
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for fabricating a semiconductor device includes forming a stacked structure on a substrate, forming a first interlayer dielectric covering the stacked structure, and forming a second interlayer dielectric covering the first interlayer dielectric. The stacked structure includes a stepwise shape. The first interlayer dielectric includes at least one step portion having a slope surface connecting a first top surface to a second top surface. The first top surface and the sloped surface define a first angle that is an obtuse angle. A level of the second top surface is higher than a level of the first top surface.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.