Method of forming spacers for a gate of a transistor
US9780191B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jan 15, 2016 |
| Grant date | Oct 3, 2017 |
| Priority date | — |
| Expiry date | Jan 15, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/02274
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The invention describes a method for forming spacers (152a, 152b) of a field effect transistor gate, comprising a step of forming a protection layer (152) covering the gate of said transistor, at least a step of modifying the protection layer, executed after the step of forming the protection layer, by contacting the protection layer (152) with plasma comprising ions heavier than hydrogen and CxHy where x is the proportion of carbon and y is the proportion of hydrogen to form a modified protection layer (158) and a carbon film (271). The protection layer being nitride (N)-based and/or silicon (Si)-based and/or carbon (C)-based and shows a dielectric constant equal or less than 8.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.