System on chip and method therefor
US9781120B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 18, 2013 |
| Grant date | Oct 3, 2017 |
| Priority date | — |
| Expiry date | Aug 3, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L63/08
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system on chip comprises a responder unit comprising a set of responder elements and an access control unit associated with an authorization list and the responder unit. An entry of the authorization list defines a set of access requirements in relation to an address space identifying at least part of the responder unit. The access control unit is arranged to: receive a request for access to a target responder element among the responder elements of the responder unit, determine the corresponding set of access requirements for the received access request from the authorization list, and evaluate the request for access with respect to the determined set of access requirements and generate a first request evaluation result. A protection unit associated with the responder unit is arranged to: provide a group assignment assigning a group to each of the responder elements of the responder unit, provide a group authorization list, an entry of the group authorization list defining a set of group access requirements for the group assigned, receive the request for access to the target responder element, determine the group assigned to the target responder element from the group assignment…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.