Low voltage selftime tracking circuitry for write assist based memory operation
US9786364B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 16, 2016 |
| Grant date | Oct 10, 2017 |
| Priority date | — |
| Expiry date | Dec 16, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/412
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Disclosed herein is an electronic device including a bit line and a complementary bit line, first and second cross coupled inverters, a first pass gate coupled between the complementary bit line and the first inverter, and a second pass gate coupled between the bit line and the second inverter. The electronic device also includes third and fourth cross coupled inverters, a third pass gate coupled between the complementary bit line and the third inverter, and a fourth pass gate coupled between the bit line and the fourth inverter. The first, second, and fourth inverters are powered between a supply node and a reference node, and the third inverter is powered between a floating node and the reference node. The first pass gate and third pass gate are coupled in parallel.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.