Nonvolatile memory device and wordline driving method thereof
US9786372B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 3, 2016 |
| Grant date | Oct 10, 2017 |
| Priority date | — |
| Expiry date | Jun 3, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/3459
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
According to example embodiments of inventive concepts, a nonvolatile memory device includes a memory cell array, an address decoder, an input/output circuit, a voltage generation circuit, and control logic. The memory cell array includes a plurality of memory blocks on a substrate. Each of the memory blocks includes a plurality of strings connected between bit lines and a common source line. The address decoder is configured to measure impedance information of word lines of a selected memory block. The voltage generation circuit is configured to generate word line voltages to be applied to word lines, and at least one of the word line voltages includes an offset voltage and a target voltage. The control logic is configured to adjust a level of the offset voltage and the offset time depending on the measured impedance information of the word lines.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.