Bad column management in nonvolatile memory
US9792175B2 · kind B2 · utility
2Cited by
16References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 21, 2015 |
| Grant date | Oct 17, 2017 |
| Priority date | — |
| Expiry date | Nov 27, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/3418
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
When the number of bad columns in a memory or plane is less than a threshold number then a first Error Correction Code (ECC) scheme encodes user data in first pages of a first size. If the number of bad columns is greater than the threshold number then a second ECC scheme encodes the user data in second pages of a second size that is smaller than the first size.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.