Patent · US Active

Accurate glitch detection

US9792394B2 · kind B2 · utility

1Cited by

4References

20Claims

0Family size

Assignee

SYNOPSYS, INC. · US

Inventors

Kaushik De · Pleasanton, US
Dipti Ranjan Senapati · Bhubaneshwar, IN
Mahantesh D. Narwade · Bengaluru, IN
Namit Gupta · San Jose, US
Rajarshi Mukherjee · Savanuru, IN

Key dates

Filing date	Jan 30, 2016
Grant date	Oct 17, 2017
Priority date	—
Expiry date	Jan 30, 2036

Classification

Technology area (CPC Y)Emerging Cross-Sectional Technologies
CPC primaryY02P90/02
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Systems and techniques for detecting design problems in a circuit design are described. A higher-level abstraction of the circuit design can be synthesized to obtain a lower-level abstraction of the circuit design, and a mapping between signals in the higher-level abstraction and the signals in the lower-level abstraction. A design problem can be detected in the circuit design in response to determining that a possible glitch in a signal in the lower-level abstraction is not blocked when an enable signal is assigned a blocking value. The enable signal and the corresponding blocking value are identified by analyzing the higher-level abstraction.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.