Integrated circuit hierarchical design tool apparatus and method of hierarchically designing an integrated circuit
US9792399B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 7, 2013 |
| Grant date | Oct 17, 2017 |
| Priority date | — |
| Expiry date | Jan 22, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/398
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated circuit hierarchical design tool apparatus comprises a processor arranged to support a block coupling reconfiguration unit. The block coupling reconfiguration unit is capable of receiving block layout data comprising block placement, terminal location data and intra-block connectivity data. The block coupling reconfiguration unit is arranged to identify from the block layout data a block placement level block having a terminal respectively coupled to a plurality of other block placement level blocks by a plurality of nets, and to provide the block with an additional terminal capable of providing the same function as the terminal. The block coupling reconfiguration unit is also arranged to replace a net of the plurality of nets that is coupled to the terminal with a replacement net coupled to the additional terminal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.