Patent · US Active

Microprocessor with secure execution mode and store key instructions

US9798898B2 · kind B2 · utility

4Cited by

34References

19Claims

0Family size

Assignee

VIA Technologies, Inc. · TW

Inventors

G. Glenn Henry · Austin, US
Terry Parks · Austin, US
Brent Bean · Austin, US
Thomas A. Crispin · Austin, US

Key dates

Filing date	Oct 15, 2015
Grant date	Oct 24, 2017
Priority date	—
Expiry date	Feb 15, 2036

Classification

Technology area (CPC H)Electricity
CPC primaryH04L2209/20
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A microprocessor conditionally grants a request to switch from a normal execution mode in which encrypted instructions cannot be executed, into a secure execution mode (SEM). Thereafter, the microprocessor executes a plurality of instructions, including a store-key instruction to write a set of one or more cryptographic key values into a secure memory of the microprocessor. After fetching an encrypted program from an instruction cache, the microprocessor decrypts the encrypted program into plaintext instructions using decryption logic within the microprocessor's instruction-processing pipeline.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.