Per-shader preamble for graphics processing

US9799089B1 · kind B1 · utility

Assignee

• QUALCOMM Incorporated · US

Inventors

• Lin Chen · Tangxia, CN
• Yun Du · San Diego, US
• Andrew Evan Gruber · Arlington, US
• Guofang Jiao · San Diego, US
• Chun Yu · San Diego, US
• David Rigel Garcia Garcia · Toronto, CA

Key dates

• Filing date: May 23, 2016
• Grant date: Oct 24, 2017
• Expiry date: Jun 16, 2036

Classification

• Technology area (CPC G): Physics
• CPC primary: G06T1/60
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

A method for processing data in a graphics processing unit including receiving a code block of instructions common to a plurality of groups of threads of a shader, executing the code block of instructions common to the plurality of groups of threads of the shader creating a result by a first group of threads of the plurality of groups of threads, storing the result of the code block of instructions common to the plurality of groups of threads of the shader in on-chip random access memory (RAM), the on-chip RAM accessible by each of the plurality of groups of threads, and upon a determination that storing the result of the code block of instructions common to the plurality of groups of threads of the shader has completed, returning the result of the code block of instructions common to the plurality of groups of threads of the shader from on-chip RAM.