Multi-bit MRAM cell and method for writing and reading to such MRAM cell
US9799384B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Apr 23, 2015 |
| Grant date | Oct 24, 2017 |
| Priority date | — |
| Expiry date | Apr 23, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/5607
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A multi-bit magnetic random access memory (MRAM) cell including a magnetic tunnel junction including: a first magnetic storage layer, a second magnetic storage layer, a magnetic sense layer, a first spacer layer between the first magnetic storage layer and the magnetic sense layer, and a second spacer layer between the second magnetic storage layer and the sense layer. The first and second storage magnetization are switchable between m directions to store data corresponding to one of m2 logic states, with m>2. The present disclosure further concerns a method for writing and reading to the MRAM cell and to memory devices including multi-bit MRAM cells.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.