Selective sputtering with light mass ions to sharpen sidewall of subtractively patterned conductive metal layer
US9799519B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 24, 2016 |
| Grant date | Oct 24, 2017 |
| Priority date | — |
| Expiry date | Jun 24, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/5329
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A dielectric layer is formed on a silicon substrate. A liner layer is formed on the dielectric layer. A conductive metal layer is formed on the liner layer. A first sputter etching operation is performed on the conductive metal layer, wherein the first sputter etching operation uses a first type of etch chemistry configured to subtractively pattern the conductive metal layer for a first etching time period resulting in the remaining conductive metal layer having respective sidewalls that are not substantially vertical. A second sputter etching operation is performed on the remaining conductive metal layer, wherein the second sputter etching operation uses a second type of etch chemistry configured to further subtractively pattern the remaining conductive metal layer for a second etching time period resulting in the remaining conductive metal layer having respective sidewalls that are substantially vertical. The conductive metal layer remaining after the second sputter etching operation comprises a metal interconnect.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.