Structure of dual gate oxide semiconductor TFT substrate
US9799677B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 1, 2016 |
| Grant date | Oct 24, 2017 |
| Priority date | — |
| Expiry date | Dec 1, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02F2201/123
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A dual gate oxide semiconductor thin-film transistor (TFT) substrate includes a substrate; a bottom gate positioned on the substrate; a bottom gate isolation layer positioned on the substrate and the bottom gate; a first oxide semiconductor layer positioned on the bottom gate isolation layer above the bottom gate; an oxide conductor layer positioned on the bottom gate isolation layer at one side of the first oxide semiconductor layer; a top gate isolation layer positioned on the first oxide semiconductor layer, the oxide conductor layer, and the bottom gate isolation layer; a top gate positioned on the top gate isolation layer above a middle part of the first oxide semiconductor layer; a source and a drain positioned on the top gate isolation layer at two sides of the top gate; and a passivation layer positioned on the top gate isolation layer, the source, the drain, and the top gate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.