Conditional execution support for ISA instructions using prefixes
US9804852B2 · kind B2 · utility
1Cited by
7References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 30, 2011 |
| Grant date | Oct 31, 2017 |
| Priority date | — |
| Expiry date | Dec 24, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/30185
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In one embodiment, a processor includes an instruction decoder to receive a first instruction having a prefix and an opcode and to generate, by an instruction decoder of the processor, a second instruction executable based on a condition determined based on the prefix, and an execution unit to conditionally execute the second instruction based on the condition determined based on the prefix.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.