System and method for multi-location zapping
US9805964B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 14, 2016 |
| Grant date | Oct 31, 2017 |
| Priority date | — |
| Expiry date | Mar 14, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L22/14
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A system for zapping a wafer, the system may include a pulse generation unit that is configured to generate (a) first zapping pulses for causing a breakdown in a first location of a backside insulating layer of a wafer, and (b) second zapping pulses for causing a breakdown in a second location of the backside insulating layer of the wafer; a first conductive interface that is configured to convey the first zapping pulses to the first location, while contacting the first location; a second conductive interface that is configured to convey the second zapping pulses to the second location, while contacting the second location; and wherein the first location differs from the second location.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.