Sacrificial cap for forming semiconductor contact
US9805989B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 22, 2016 |
| Grant date | Oct 31, 2017 |
| Priority date | — |
| Expiry date | Sep 22, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/011
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for forming a semiconductor device includes forming a fins on a substrate, forming a sacrificial gate stack over a channel region of the fins, a source/drain region with a first material on the fins, a first cap layer with a second material over the source/drain region, and a second cap layer with a third material on the first cap layer. A dielectric layer is deposited over the second cap layer. The sacrificial gate stack is removed to expose a channel region of the fins. A gate stack is formed over the channel region of the fins. A portion of the dielectric layer is removed to expose the second cap layer. The second cap layer and the first cap layer are removed to expose the source/drain region. A conductive material is deposited on the source/drain region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.