Chip-scale packaging with protective heat spreader
US9806001B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 29, 2015 |
| Grant date | Oct 31, 2017 |
| Priority date | — |
| Expiry date | Jun 29, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package can include a semiconductor die having an integrated circuit, a first die surface, and an opposite second die surface. A packaging can be attached to the die and have a holder surface opposite the first die surface. A heat spreader can be configured to cover the second die surface and the packaging surface and can be attached thereto by a layer of adhesive positioned between the heat spreader and the semiconductor die. A semiconductor package array can include an array of semiconductor dies and a heat spreader configured to cover each semiconductor die. A conductive lead can be electrically connected to the integrated circuit in a semiconductor die and can extend from the first die surface. Manufacturing a semiconductor package can include applying thermally conductive adhesive to the heat spreader and placing the heat spreader proximate the semiconductor die.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.