3DIC seal ring structure and methods of forming same
US9806119B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 9, 2014 |
| Grant date | Oct 31, 2017 |
| Priority date | — |
| Expiry date | Mar 11, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a first semiconductor chip including a first substrate, a plurality of first dielectric layers and a plurality of conductive lines formed in the first dielectric layers over the first substrate. The semiconductor device further includes a second semiconductor chip having a surface bonded to a first surface of the first semiconductor chip, the second semiconductor chip including a second substrate, a plurality of second dielectric layers and a plurality of second conductive lines formed in the second dielectric layers over the second substrate. The semiconductor device further includes a first conductive feature extending from the first semiconductor chip to one of the plurality of second conductive lines, and a first seal ring structure extending from the first semiconductor chip to the second semiconductor chip.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.