NVM memory HKMG integration technology

US9812460B1 · kind B1 · utility

Assignee

• TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD. · TW

Inventors

• Wei-Cheng Wu · Hengshan, TW
• Chien-Hung Chang · Taipei, TW

Key dates

• Filing date: May 24, 2016
• Grant date: Nov 7, 2017
• Expiry date: May 24, 2036

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/85

Abstract

The present disclosure relates to an integrated circuit (IC) that includes a HKMG hybrid non-volatile memory (NVM) device and that provides small scale and high performance, and a method of formation. In some embodiments, the integrated circuit includes a memory region having a NVM device with a pair of control gate electrodes separated from a substrate by corresponding floating gates. A pair of select gate electrodes are disposed at opposite sides of the pair of control gate electrodes comprise polysilicon. A logic region is disposed adjacent to the memory region and has a logic device with a metal gate electrode disposed over a logic gate dielectric and having bottom and sidewall surfaces covered by a high-k gate dielectric layer.