Three-dimensional semiconductor devices
US9812526B2 · kind B2 · utility
2Cited by
11References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 8, 2016 |
| Grant date | Nov 7, 2017 |
| Priority date | — |
| Expiry date | Sep 8, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/35
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A three-dimensional (3D) semiconductor device includes a plurality of gate electrodes stacked on a substrate in a direction normal to a top surface of the substrate, a channel structure passing through the gate electrodes and connected to the substrate, and a void disposed in the substrate and positioned below the channel structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.