Device and method for increasing packet processing rate in a network device
US9813336B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 17, 2014 |
| Grant date | Nov 7, 2017 |
| Priority date | — |
| Expiry date | Jul 1, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L69/22
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A first set of bits is extracted from a header of a first packet. A second set of bits is extracted from a header of a second packet. The first set of bits and the second set of bits are combined into a combined single data unit representing the first packet and the second packet. The combined single data unit is transferred to a packet processing device. The packet processing device decomposes the single data unit to extract the first set of bits corresponding to the first packet and the second set of bits corresponding to the second packet. A first reduced set of processing operations is performed to process the first packet using the first set of bits corresponding to the first packet. A second reduced set of processing operations is performed to process the second packet using the second set of bits corresponding to the second packet.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.