Exploiting input data sparsity in neural network compute units
US9818059B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 22, 2017 |
| Grant date | Nov 14, 2017 |
| Priority date | — |
| Expiry date | Mar 22, 2037 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computer-implemented method includes receiving, by a computing device, input activations and determining, by a controller of the computing device, whether each of the input activations has either a zero value or a non-zero value. The method further includes storing, in a memory bank of the computing device, at least one of the input activations. Storing the at least one input activation includes generating an index comprising one or more memory address locations that have input activation values that are non-zero values. The method still further includes providing, by the controller and from the memory bank, at least one input activation onto a data bus that is accessible by one or more units of a computational array. The activations are provided, at least in part, from a memory address location associated with the index.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.