Dong Hyuk Woo
57Patents
11h-index
25Co-inventors
74Inventor score
Filing activity: May 24, 2012 → Sep 1, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US9710265B1 | Neural network compute tile | Physics | 110 | Active |
| US9836691B1 | Neural network instruction set architecture | Physics | 76 | Active |
| US9818059B1 | Exploiting input data sparsity in neural network compute units | Emerging Cross-Sectional Technologies | 51 | Active |
| US10019668B1 | Scheduling neural network processing | Physics | 37 | Active |
| US10175980B2 | Neural network compute tile | Physics | 34 | Active |
| US9959247B1 | Permuting in a matrix-vector processor | Physics | 19 | Active |
| US9959498B1 | Neural network instruction set architecture | Physics | 19 | Active |
| US10504022B2 | Neural network accelerator with parameters resident on chip | Physics | 19 | Active |
| US8806171B2 | Systems and methods providing wear leveling using dynamic randomization for non-volatile memory | Physics | 16 | Active |
| US9875104B2 | Accessing data in multi-dimensional tensors | Physics | 13 | Active |
| US9606797B2 | Compressing execution cycles for divergent execution in a single instruction multiple data (SIMD) processor | Physics | 11 | Active |
| US9323525B2 | Monitoring vector lane duty cycle for dynamic optimization | Emerging Cross-Sectional Technologies | 11 | Active |
| US10534607B2 | Accessing data in multi-dimensional tensors using adders | Physics | 10 | Active |
| US10496326B2 | Hardware double buffering using a special purpose computational unit | Physics | 9 | Active |
| US9798701B2 | Matrix processing apparatus | Physics | 9 | Active |
| US9946539B1 | Accessing data in multi-dimensional tensors using adders | Physics | 8 | Active |
| US10802956B2 | Accessing prologue and epilogue data | Physics | 8 | Active |
| US10248908B2 | Alternative loop limits for accessing data in multi-dimensional tensors | Physics | 7 | Active |
| US9805001B2 | Matrix processing apparatus | Physics | 7 | Active |
| US9875100B2 | Accessing data in multi-dimensional tensors | Physics | 6 | Active |
| US10936942B2 | Apparatus and mechanism for processing neural network tasks using a single chip package with multiple identical dies | Electricity | 6 | Active |
| US10360163B2 | Exploiting input data sparsity in neural network compute units | Emerging Cross-Sectional Technologies | 5 | Active |
| US9898441B2 | Matrix processing apparatus | Electricity | 5 | Active |
| US9477628B2 | Collective communications apparatus and method for parallel systems | Physics | 4 | Active |
| US9880976B2 | Matrix processing apparatus | Electricity | 3 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.