Method for producing semiconductor package
US9818736B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 3, 2017 |
| Grant date | Nov 14, 2017 |
| Priority date | — |
| Expiry date | Mar 3, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/384
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for producing a semiconductor package in which a plurality of semiconductor chips, each of which includes a substrate, conductive portions formed on the substrate, and microbumps formed on the conductive portions, are laminated, which includes a smooth surface formation process of forming a smooth surface on the microbump, a lamination process of laminating three or more of the semiconductor chips by overlaying the microbump of one of the semiconductor chips on the microbump of another one of the semiconductor chips, and a bonding process of bonding the semiconductor chips to each other via the microbumps by heating to melt the microbumps, in which in the lamination process, of one of the semiconductor chips and another one of the semiconductor chips, the smooth surface is formed on at least one of the microbump, and one of the microbump contacts another one of the microbump on the smooth surface.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.