Power semiconductor device with contiguous gate trenches and offset source trenches

US9818743B2 · kind B2 · utility

Assignee

• Infineon Technologies Americas Corp. · US

Inventors

• Kapil Kelkar · Torrance, US
• Timothy Henson · Torrance, US
• Ling Ma · Huizhou, CN
• Hugo Burke · Llantrisant, GB
• Niraj Ranjan · El Segundo, US
• Alain Charles · Singapore, SG

Key dates

• Filing date: Jun 9, 2014
• Grant date: Nov 14, 2017
• Expiry date: Aug 12, 2034

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D62/393

Abstract

Disclosed is a power semiconductor device that includes a plurality of source trenches and adjacent source regions. The plurality of source trenches extend from a top surface of a semiconductor substrate into the semiconductor substrate. The power semiconductor device further includes a plurality of gate trenches that extend from the top of the semiconductor substrate into the semiconductor substrate, and are arranged in hexagonal or zigzag patterns. A contiguous formation is created by the plurality of gate trenches, and the plurality of gate trenches separate the plurality of source trenches from one another.