Patent · US Active

Critical path architect

US9823298B2 · kind B2 · utility

4Cited by

10References

19Claims

0Family size

Assignee

Arm Limited · GB

Inventors

Satheesh Balasubramanian · Bengaluru, IN
Shardendu Shekhar · Austin, US
James Dennis Dodrill · Austin, US
Sainarayanan Karatholuvu Suryanarayanan · Bengaluru, IN

Key dates

Filing date	Aug 12, 2015
Grant date	Nov 21, 2017
Priority date	—
Expiry date	Aug 12, 2035

Classification

Technology area (CPC G)Physics
CPC primaryG06F2119/12
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Various implementations described herein are directed to a system and methods for implementing a critical path architect. In one implementation, the critical path architect may be implemented with a system having a processor and memory including instructions stored thereon that, when executed by the processor, cause the processor to analyze timing data of an integrated circuit. The timing data may include transition times for cells along paths of the integrated circuit. The instructions may cause the processor to identify instances of timing degradation for the cells along the paths of the integrated circuit. The instructions may cause the processor to recommend changes for the instances of the cells along the paths having timing degradation.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.