James Dennis Dodrill
13Patents
4h-index
23Co-inventors
56Inventor score
Filing activity: Jun 10, 2008 → Nov 27, 2019
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8024591B2 | Method of and apparatus for reducing power consumption within an integrated circuit | Emerging Cross-Sectional Technologies | 31 | Active |
| US10641822B2 | Critical path architect | Physics | 8 | Active |
| US9825636B1 | Apparatus and method for reduced latency signal synchronization | Electricity | 6 | Active |
| US10187063B1 | Sequential logic device with single-phase clock operation | Electricity | 4 | Active |
| US9823298B2 | Critical path architect | Physics | 4 | Active |
| US9892220B2 | Method and apparatus for adjusting a timing derate for static timing analysis | Physics | 1 | Active |
| US9912338B1 | Apparatus and method for reduced latency signal synchronization | Electricity | 1 | Active |
| US11520658B2 | Non-volatile memory on chip | Physics | 0 | Active |
| US9479147B2 | Synchroniser flip-flop | Electricity | 0 | Active |
| US10020031B2 | Location-based optimization for memory systems | Physics | 0 | Active |
| US11586445B2 | Modular gated multiplier circuitry and multiplication technique | Physics | 0 | Active |
| US9690889B2 | Method for adjusting a timing derate for static timing analysis | Physics | 0 | Active |
| US9651620B2 | Measurements circuitry and method for generating an oscillating output signal used to derive timing information | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.