Patent · US Active

Memory mapping in a processor having multiple programmable units

US9824038B2 · kind B2 · utility

0Cited by

373References

3Claims

0Family size

Assignee

Intel Corporation · US

Inventors

Gilbert M. Wolrich · Framingham, US
Debra Bernstein · Sudbury, US
Daniel Cutter · Townsend, US
Christopher Dolan · Milford, US
Matthew J. Adiletta · Bolton, US

Key dates

Filing date	Oct 14, 2015
Grant date	Nov 21, 2017
Priority date	—
Expiry date	Oct 14, 2035

Classification

Technology area (CPC G)Physics
CPC primaryG06F2212/251
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

The disclosure includes, in general, among other aspects, an apparatus having multiple programmable units integrated within a processor. The apparatus has circuitry to map addresses in a single address space to resources within the multiple programmable units where the single address space includes addresses for different ones of the resources in different ones of the multiple programmable units and where there is a one-to-one correspondence between respective addresses in the single address space and resources within the multiple programmable units.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.