Hardware chip select training for memory using read commands
US9824772B2 · kind B2 · utility
3Cited by
12References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 26, 2012 |
| Grant date | Nov 21, 2017 |
| Priority date | — |
| Expiry date | Feb 6, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/40
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of training chip select for a memory module. The method includes programming a memory controller into a mode wherein a command signal is active for a programmable time period. The method then programs a programmable delay line of the chip select with a delay value and performs initialization of the memory module. A read command is then sent to the memory module to toggle a state of the chip select. A number of data strobe signals sent by the memory module in response to the read command are counted. A determination is made whether the memory module is in a pass state or an error state based on a result of the counting.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.