Integrated circuit assemblies with rigid layers used for protection against mechanical thinning and for other purposes, and methods of fabricating such assemblies

US9824974B2 · kind B2 · utility

Assignee

• Invensas LLC · US

Inventors

• Guilian Gao · San Jose, US
• Cyprian Emeka Uzoh · San Jose, US
• Charles G. Woychik · San Jose, US
• Hong Shen · Omaha, US
• Arkalgud R. Sitaram · Cupertino, US
• Liang Wang · Newark, US
• Akash Agrawal · San Jose, US
• Rajesh Katkar · Milpitas, US

Key dates

• Filing date: Nov 30, 2016
• Grant date: Nov 21, 2017
• Expiry date: Nov 30, 2036

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/3511
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Die (110) and/or undiced wafers and/or multichip modules (MCMs) are attached on top of an interposer (120) or some other structure (e.g. another integrated circuit) and are covered by an encapsulant (160). Then the interposer is thinned from below. Before encapsulation, a layer (410) more rigid than the encapsulant is formed on the interposer around the die to reduce or eliminate interposer dishing between the die when the interposer is thinned by a mechanical process (e.g. CMP). Other features are also provided.