MIM/RRAM structure with improved capacitance and reduced leakage current
US9825117B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 28, 2016 |
| Grant date | Nov 21, 2017 |
| Priority date | — |
| Expiry date | Dec 28, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/25
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Some embodiments of the present disclosure provide an integrated circuit (IC) device including a metal-insulator-metal (MIM) capacitor structure. The MIM capacitor structure includes a lower metal capacitor electrode, an upper metal capacitor electrode, and a capacitor dielectric separating the lower metal capacitor electrode from the upper metal capacitor electrode. The capacitor dielectric is made up of an amorphous oxide/nitride matrix and a plurality of metal or metal oxide/nitride nano-particles that are randomly distributed over the volume of amorphous oxide/nitride matrix.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.