Method and system for dynamic power management of memories
US9830954B2 · kind B2 · utility
1Cited by
11References
14Claims
0Family size
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Key dates
| Filing date | Mar 23, 2011 |
| Grant date | Nov 28, 2017 |
| Priority date | — |
| Expiry date | Apr 17, 2033 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for dynamic power management of memories. In one embodiment of the invention, the power consumption of the memories is reduced based on the operating state of the memories. For example, in one embodiment of the invention, the power supply to the memories is reduced when the memories are in an inactive state by reducing and/or turning off the input voltage(s) to the memories. In one embodiment of the invention, the processing unit dynamically changes the strength of the On-Die Termination pull-up/pull-down resistance based on the memory operating mode, memory voltage, and memory temperature.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.