Memory system and writing method
US9830983B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 20, 2017 |
| Grant date | Nov 28, 2017 |
| Priority date | — |
| Expiry date | Feb 20, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/5648
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A nonvolatile memory device includes memory cells, bit lines, a word line, and a control unit performing a write operation in first and second stages. During the first stage, the control unit applies voltages to the word line and the bit lines based on first page of data to maintain threshold voltages for a first group of memory cells and shift the threshold voltages for a second group of memory cells above a first threshold. During the second stage, the control unit applies voltages to the word line and the bit lines based on second and third pages of data to shift the threshold voltages of memory cells in the first group to threshold voltages in one of first, second, and third threshold voltage ranges and the threshold voltages of memory cells in the second group to threshold voltages in one of fourth, fifth, sixth, and seventh threshold voltage ranges.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.