Wafer-level package with metal shielding structure and the manufacturing method thereof
US9831197B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 2, 2017 |
| Grant date | Nov 28, 2017 |
| Priority date | — |
| Expiry date | Feb 2, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3025
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Provided is a wafer-level package with metal shielding structure and the manufacturing method for producing the same. The wafer-level package includes first conductive structures for securing a die unit to a substrate, and is featured by disposing one or more second conductive structures that are located at the front surface of the die unit and proximate to a side surface of the die unit. The second conductive structure does not electrically connected to the internal circuitry of the die unit. After the wafer is cut, a metal shielding layer is formed on the back surface and the side surfaces of the die unit. Afterwards, the die unit is mounted on the substrate to allow the second conductive structure to connect to the ground structure on the substrate and connect to the metal shielding layer. Thus, EMI shielding function is generated to efficiently suppress EMI and miniaturize the package.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.