Semiconductor package and forming method thereof
US9831215B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 3, 2016 |
| Grant date | Nov 28, 2017 |
| Priority date | — |
| Expiry date | Aug 3, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3511
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package includes at least one first semiconductor device, a first molding compound, a dielectric layer, at least one conductive feature and at least one compensating structure. The first molding compound is present on at least one sidewall of the first semiconductor device. The dielectric layer is present on the first molding compound and the first semiconductor device. The conductive feature present is at least partially in the dielectric layer and electrically connected to the first semiconductor device. The compensating structure is present at least partially in the dielectric layer. The compensating structure is monolithically connected to the first molding compound.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.