Inventor · Xiluo, TW

An-Jhih Su

182Patents
13h-index
65Co-inventors
85Inventor score

Filing activity: Mar 30, 2010 → Jul 1, 2024

Most-cited inventions

PatentTitleAreaCited byStatus
US9735131B2 Multi-stack package-on-package structures Electricity 624 Active
US9812337B2 Integrated circuit package pad and methods of forming Electricity 57 Active
US10784248B2 Multi-stack package-on-package structures Electricity 38 Active
US10090284B2 Semiconductor device and method of manufacture Electricity 38 Active
US10490540B2 Multi-stack package-on-package structures Electricity 37 Active
US10163803B1 Integrated fan-out packages and methods of forming the same Electricity 36 Active
US9859258B2 Semiconductor device and method of manufacture Electricity 36 Active
US10658337B2 Packages and packaging methods for semiconductor devices, and packaged semiconductor devices Electricity 34 Active
US9728498B2 Package structure Electricity 24 Active
US9859245B1 Chip package structure with bump and method for forming the same Electricity 24 Active
US9793246B1 Pop devices and methods of forming the same Electricity 21 Active
US9583415B2 Packages with thermal interface material on the sidewalls of stacked dies Electricity 21 Active
US10347606B2 Devices employing thermal and mechanical enhanced layers and methods of forming same Electricity 15 Active
US9646955B2 Packages and methods of forming packages Electricity 12 Active
US9793231B2 Under bump metallurgy (UBM) and methods of forming same Electricity 12 Active
US9484227B1 Dicing in wafer level package Electricity 12 Active
US9825007B1 Chip package structure with molding layer and method for forming the same Electricity 11 Active
US10879224B2 Package structure, die and method of manufacturing the same Electricity 10 Active
US9831215B1 Semiconductor package and forming method thereof Electricity 10 Active
US11177142B2 Method for dicing integrated fan-out packages without seal rings Electricity 9 Active
US10083927B2 Chip package structure with bump Electricity 9 Active
US9806059B1 Multi-stack package-on-package structures Electricity 8 Active
US10157899B2 Packages and methods of forming packages Electricity 8 Active
US10103125B2 Chip package structure and method for forming the same Electricity 8 Active
US10811394B2 Devices employing thermal and mechanical enhanced layers and methods of forming same Electricity 8 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.