Patent · US Active

Safety hypervisor function

US9836318B2 · kind B2 · utility

3Cited by

3References

14Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Simon Brewerton · Trowbridge, GB
Glenn Ashley Farrall · Long Ashton, GB
Neil Hastie · Gloucester, GB
Frank Hellwig · Wunstorf, DE
Richard Knight · Deeping St James, GB
Antonio Vilela · Mering, DE

Key dates

Filing date	Mar 12, 2014
Grant date	Dec 5, 2017
Priority date	—
Expiry date	Feb 26, 2036

Classification

Technology area (CPC G)Physics
CPC primaryG06F2009/45587
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

The disclosure relates to systems and methods for defining a processor safety privilege level for controlling a distributed memory access protection system. More specifically, a safety hypervisor function for accessing a bus in a computer processing system includes a module, such as a Computer Processing Unit (CPU) or a Direct Memory Access (DMY) for accessing a system memory and a memory unit for storing a safety code, such as a Processor Status Word (PSW) or a configuration register (DMA (REG)). The module allocates the safety code to a processing transaction and the safety code is visible upon access of the bus by the module.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.