Method of simulating a semiconductor integrated circuit, computer program product, and device for simulating a semiconductor integrated circuit
US9836567B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 14, 2012 |
| Grant date | Dec 5, 2017 |
| Priority date | — |
| Expiry date | Sep 14, 2032 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02T10/82
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and device for simulating a semiconductor IC is provided, which comprises generating a high level description of the IC, generating a low level description of the IC comprising a plurality of instances describing the operation of the IC, conducting a low level function analysis of the IC based on metrics values associated with the instances, and performing a design optimization scheme. The scheme comprises mapping the metric values of instances describing functional units different from standard cells, to standard cells logically connected to said instances, by dividing each of the instance metrics values between a group of standard cells logically connected to the corresponding instance and adding each resulting portion of said instance metric value to the metric value of each of the group of standard cells, respectively.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.