Incremental common path pessimism analysis
US9836572B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 19, 2015 |
| Grant date | Dec 5, 2017 |
| Priority date | — |
| Expiry date | Nov 19, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/3323
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method, system, and computer program product for performing incremental common path pessimism analysis in integrated circuit design includes performing common path pessimism removal (CPPR) analysis to provide timing credit for one or more paths that are subject to common path pessimism. The method also includes identifying one or more post-CPPR critical paths based on the CPPR analysis, setting flags for critical nodes of the one or more post-CPPR critical paths, performing a design fix to address the one or more post-CPPR critical paths, and applying a set of rules based on the design fix and the flags to identify seed points among the critical nodes of the one or more post-CPPR critical paths. Invalidating and re-performing the CPPR analysis is done only for paths associated with the seed points.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.