Patent · US Active

Method for manufacturing semiconductor fin structure with extending gate structure

US9837510B2 · kind B2 · utility

20Cited by
6References
19Claims
0Family size

Assignee

Inventors

Key dates

Filing dateOct 20, 2016
Grant dateDec 5, 2017
Priority date
Expiry dateOct 20, 2036

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D64/519
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes a substrate and a fin structure formed over the substrate. The semiconductor structure further includes an isolation structure formed around the fin structure and a gate structure formed across the fin structure. In addition, the gate structure includes a first portion formed over the fin structure and a second portion formed over the isolation structure, and the second portion of the gate structure includes an extending portion extending into the isolation structure.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.