Processor power optimization with response time assurance
US9841998B2 · kind B2 · utility
2Cited by
30References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 15, 2016 |
| Grant date | Dec 12, 2017 |
| Priority date | — |
| Expiry date | Mar 15, 2036 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for managing processor power optimization is provided. The method may include receiving a plurality of tasks for processing by a processor environment. The method may also include allocating a portion of a compute resource corresponding to the processor environment to each of the received plurality of tasks, the allocating of the portion being based on both an execution time and a response time associated with each of the received plurality of tasks.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.