Non-volatile SRAM memory cell, and non-volatile semiconductor storage device
US9842650B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 22, 2015 |
| Grant date | Dec 12, 2017 |
| Priority date | — |
| Expiry date | Jul 22, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C14/0063
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A first switch transistor and a second switch transistor are turned on concurrently. Thereby a first ReRAM is electrically connected to a first storage node, and a second ReRAM is electrically connected to a second storage node. Complementary SRAM data stored in an SRAM is programmed into a non-volatile memory section of a first memory cell and a second memory cell. One of the first switch transistor and the second switch transistor is turned on to electrically connect only the first ReRAM to the first storage node or to electrically connect only the second ReRAM to the second storage node. Hence, the first memory cell or the second memory cell functions as an independent-type cell in accordance with usage. Data is programmed separately into the first memory cell M1a or the second memory cell M1b. Thus memory capacity is increased.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.