Chip-stacking apparatus having a transport device configured to transport a chip onto a substrate
US9842823B2 · kind B2 · utility
3Cited by
2References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 29, 2014 |
| Grant date | Dec 12, 2017 |
| Priority date | — |
| Expiry date | Dec 29, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/80132
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A chip-stacking apparatus for stacking a chip on a substrate is provided. The chip-stacking apparatus includes a substrate support configured to carry the substrate and a transport device configured to dispose a chip to the substrate. The transport device includes a bond head including a bond base and an attaching element disposed on the bond base and configured to allow the chip to be attached thereon. The center area of the attaching element is higher than an edge area of the attaching element relative to the bond base.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.