Performance analysis using configurable hardware emulation within an integrated circuit
US9846587B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 15, 2014 |
| Grant date | Dec 19, 2017 |
| Priority date | — |
| Expiry date | Jun 5, 2036 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system includes a host data processing system and a target platform coupled to the host data processing system. The target platform includes an emulation system. The emulation system includes a processor system, an emulation circuit coupled to the processor system through an integrated circuit (IC) interconnect, and a performance monitor coupled to the IC interconnect. The emulation system receives, from the host data processing system, a software emulation model and a data traffic pattern. The emulation system emulates a system architecture by executing the software emulation model within the processor system and implementing the data traffic pattern over the IC interconnect using the emulation circuit. The emulation system provides, to the host data processing system, measurement data collected by the performance monitor during the emulation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.