Patent · US Active

Layout method for printed circuit board

US9846756B2 · kind B2 · utility

1Cited by
29References
28Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 2, 2015
Grant dateDec 19, 2017
Priority date
Expiry dateSep 8, 2035

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2119/18
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A layout method for a printed circuit board (PCB) is provided. The method obtains a memory type of a dynamic random access memory (DRAM) to be mounted on the PCB, obtains a module group from a database according to the memory type of the DRAM, wherein the module group comprises a plurality of routing modules, obtains a plurality of PCB parameters, selects a specific routing module from the module group according to the PCB parameters, and implements the specific routing module into a layout design for PCB fabrication. The specific routing module comprises layout information regarding a main chip, a memory chip and a routing configuration between the main chip and the memory chip.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.