Semiconductor device package for reducing parasitic light and method of manufacturing the same
US9850124B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 27, 2015 |
| Grant date | Dec 26, 2017 |
| Priority date | — |
| Expiry date | Oct 31, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/16195
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A semiconductor device package includes a carrier, a sensor element disposed on or within the carrier, a cover and a filter. The cover includes a base substrate and a periphery barrier. The base substrate includes an inner sidewall. The inner sidewall of the base substrate defines a penetrating hole extending from a top surface of the base substrate to a bottom surface of the base substrate; at least a portion of the inner sidewall of the base substrate is tilted. The periphery barrier is coupled to the bottom surface of the base substrate and contacts a top surface of the carrier. The filter is disposed on the top surface of the base substrate and covers the penetrating hole.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.