Accelerated content analytics based on a hierarchical data-flow-graph representation
US9858056B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 18, 2016 |
| Grant date | Jan 2, 2018 |
| Priority date | — |
| Expiry date | Jul 18, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/343
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method to hardware-accelerate finite state transducer libraries and their compilation toolchains. In an embodiment, a computer-implemented method for partitioning an UIMA-PEAR file into software-based and hardware-accelerated components may comprise creating a data-flow graph representation of the UIMA-PEAR-file, flattening hierarchies of the data-flow graph representation, and selecting the components to be hardware accelerated from the flattened hierarchies of the data-flow graph representation based on data dependencies of data types produced and consumed by each component of the flattened data-flow graph.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.