Semiconductor device and method of manufacture
US9859258B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 17, 2016 |
| Grant date | Jan 2, 2018 |
| Priority date | — |
| Expiry date | May 17, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3511
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device and a method of manufacture are provided. In particular, a semiconductor device includes a first set of through vias between and connecting a top package and a redistribution layer (RDL), the first set of through vias in physical contact with a molding compound and separated from a die. The semiconductor device also includes a first interconnect structure between and connecting the top package and the RDL, the first interconnect structure separated from the die and from the first set of through vias by the molding compound. The first interconnect structure includes a second set of through vias and at least one integrated passive device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.